The present invention relates to a method for fabricating a semiconductor device, specifically a device isolation method for CMOS devices.
To form device isolation films on LSIs, etc., LOCOS (LOCal Oxidation of Silicon) has been conventionally used because of its simple fabrication process. In a method for forming a device isolation film by LOCOS, first a base substrate is oxidized to form a pad oxide film, and a silicon nitride film which is to be an oxidation mask is formed on the pad oxide film. Then, patterning is conducted by lithography and etching so that the silicon nitride film is left only on a device region. When the substrate is oxidized, the oxidation reaction takes place in the region where the silicon nitride film is not remained, and that does not take place in the region where the silicon nitride film is remained. Thus, the device isolation film is selectively formed.
But in the LOCOS method, oxygen is diffused below the silicon nitride film through the edge of the patterned silicon nitride film, and the so-called bird's beak is formed. Consequently, the device isolation film intrudes into the device region, which is a detrimental factor for miniaturization of the device. Accordingly, it is preferred for miniaturization of the device to make the birds'beak lengths as short as possible.
A bird's beak length is very dependent on processing conditions, mainly: a thickness of the pad oxide film, a thickness of the silicon nitride film, a thickness of the device isolation film, etc. The bird's beak has a role of lessening stresses in the silicon substrate due to the oxidation. Generally, the bird's beak length as increases, stresses in the silicon substrate are reduced.
To reduce the bird's beak length, it is effective to thin the pad oxide film and thicken the silicon nitride film. But when the pad oxide film is extremely thin, a sufficient selective ratio of the silicon nitride film to the pad oxide film cannot be obtained in patterning the silicon nitride film. As a result, damages are made in the silicon substrate by the etching, and sometimes large junction leaks occur due to metal contamination of the etching apparatus, etc., which causes, e.g., the problem of defective refresh of DRAMs.
To reduce these problems, some improved LOCOS's have been proposed. One of them is Nitride-Clad LOCOS (hereinafter called NCL: Nitride-Clad LOCOS) proposed at the Symposium on VLSI Technology (J.R.Pfiester et al., "Nitride-Clad LOCOS Isolation for 0.25 .mu.m CMOS", 1993 SYMPOSIUM ON VLSI TECHNOLOGY digest of technical papers, pp.139-140.) FIG. 9 shows the fabrication method of the typical NCL.
First, a silicon substrate 10 is oxidized to form a first oxide film 12. Subsequently, a first silicon nitride film 14 is deposited and patterned (FIG. 9A). The first oxide film 12 is removed by wet etching, and next, a second oxide film 18 which is thinner than the first oxide film 12 is formed. Then, a second silicon nitride film 20 is deposited (FIG. 9B). In this state, oxidation is conducted to form a device isolation film 24 (FIG. 9C). Finally, the first silicon nitride film 14, the second silicon nitride film 20, the first oxide film 12 and the second oxide film 18 are removed (FIG. 9D). Thus a device isolation film having short bird's beaks and being substantially free from defects can be formed by NCL.
As a well forming technique used in fabrication of CMOS devices, the self-aligned twin well technique is well known (see FIG. 10).
First, a pad oxide film 32 is formed on a silicon substrate 10, and a silicon nitride film 34 which is to be an oxidation mask is deposited on the pad oxide film 32. Subsequently, the silicon nitride film 34 is patterned by lithography and etching to remove that portion of the silicon nitride film that is on a region for an n-well to be formed in.
Following the patterning of the silicon nitride film 34, an n-type impurity is implanted through the pad oxide film as a resist 36 and the silicon nitride film 34 as a mask (FIG. 10A).
After the resist 36 is removed, oxidation is conducted with the silicon nitride film 34 as a mask to selectively form a thick oxide film 38. Concurrently therewith, the n-type impurity is diffused in the substrate (FIG. 10B).
Then, after the silicon nitride film 34 is removed, a p-type impurity is implanted (FIG. 10C). At this time the p-type impurity is not implanted in the region where the n-type impurity is implanted, because of the thick oxide film 38 formed thereon. Then, a long-time high-temperature heat treatment is conducted for drive-in diffusion, and then the thick oxide film is removed. Thus, twin wells of an n-well 40 and a p-well 42 for a CMOS device are formed (FIG. 10D).
After the twin wells are thus formed, the device isolation films are formed by LOCOS.
Another twin well forming method is shown in FIG. 11.
A pad oxide film 32 is formed on a silicon substrate 10. A silicon nitride film 34 which is to be an oxidation mask is formed on the pad oxide film 32. Next, the silicon nitride film 34 is patterned by lithography and etching, and that portion of the silicon nitride film 34 that is on device isolation regions is removed (FIG. 11A).
After the resist is removed, a resist 36 is patterned by lithography, and an n-type impurity is implanted in a region for an n-well to be formed in (FIG. 11B).
Following removal of the resist 36, a resist 48 is patterned by lithography, and a p-type impurity is implanted in a region for a p-well to be formed in (FIG. 11C).
After the resist 48 is removed, a long, high-temperature heat treatment is conducted for drive-in diffusion while the implanted n-type impurity and p-type impurity are activated to form the n-well 40 and the p-well 42 (FIG. 11D).
Then, with the silicon nitride film 34, which was first patterned as a mask, oxidation is conducted to form the device isolation films.
But in the method for fabricating a semiconductor device in which the device isolation film is formed by conventional NCL, the oxidation is conducted through the second silicon nitride film, which is hard to oxidize, to form the device isolation film. Accordingly, high-temperature oxidation is necessary, and the oxide film thickness is not uniform. These are problems.
In the method for fabricating a semiconductor device wherein the device isolation film is formed by NCL, when the twin wells are formed by the self-alignment twin well technique, a global step 50 is formed in the boundary between the wells (FIG. 10D). Especially in miniaturized devices which require NCL, the lithography for the patterning has a small depth of focus (DOF), which makes formation of miniaturized patterns difficult. This is a problem.
Another problem is that halation is caused by the step in the boundary between the wells, and the pattern is deformed.
In the conventional semiconductor fabricating method in which twin wells are formed after a device isolation region has been patterned, when NCL is used to form the device isolation film, because of a thick first silicon nitride film of about 140 nm, the concentration of the impurity (which is implanted into the silicon substrate by well ion implantation at energies up to a maximum energy of about 180 keV provided by a common ion implanter) is varied with the film thickness of the first silicon nitride film. Consequently, transistor characteristics, especially a threshold voltage of the p-channel transistor, varies. This is also a problem.